Noise optimization of the source follower of a CMOS pixel using BSIM3 noise model

摘要

CMOS imagers are becoming increasingly popular in astronomy. A very low noiselevel is required to observe extremely faint targets and to get high-precisionflux measurements. Although CMOS technology offers many advantages over CCDs, amajor bottleneck is still the read noise. To move from an industrial CMOSsensor to one suitable for scientific applications, an improved design thatoptimizes the noise level is essential. Here, we study the 1/f and thermalnoise performance of the source follower (SF) of a CMOS pixel in detail. Weidentify the relevant design parameters, and analytically study their impact onthe noise level using the BSIM3v3 noise model with an enhanced model of gatecapacitance. Our detailed analysis shows that the dependence of the 1/f noiseon the geometrical size of the source follower is not limited to minimumchannel length, compared to the classical approach to achieve the minimum 1/fnoise. We derive the optimal gate dimensions (the width and the length) of thesource follower that minimize the 1/f noise, and validate our results usingnumerical simulations. By considering the thermal noise or white noise alongwith 1/f noise, the total input noise of the source follower depends on thecapacitor ratio CG/CFD and the drain current (Id). Here, CG is the total gatecapacitance of the source follower and CFD is the total floating diffusioncapacitor at the input of the source follower. We demonstrate that the optimumgate capacitance (CG) depends on the chosen bias current but ranges from CFD/3to CFD to achieve the minimum total noise of the source follower. Numericalcalculation and circuit simulation with 180nm CMOS technology are performed tovalidate our results.